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Role vocabulary

ATS resume keywords for VLSI and Semiconductor

These are the 28 terms our scorer checks a VLSI and Semiconductor resume against. It is the same list the free check uses, published in full.

Check my resume against these Build a VLSI and Semiconductor resume

The vocabulary

Coverage is 25 of the 100 points. Sixty percent of this list is full marks, so you do not need all of it, and stuffing every term in is penalised separately.

  • vlsi
  • rtl
  • verilog
  • system verilog
  • uvm
  • verification
  • synthesis
  • sta
  • static timing analysis
  • physical design
  • place and route
  • dft
  • tapeout
  • asic
  • fpga
  • soc
  • low power
  • cdc
  • lint
  • gate level simulation
  • primetime
  • innovus
  • cadence
  • synopsys
  • analog layout
  • spice
  • pdk
  • post silicon

The eight questions for VLSI and Semiconductor

The guided builder asks these, in this order, and turns each answer into a line on the page. Nothing is written that you did not type.

  1. 1.Which blocks, IPs or chips have you worked on, and at what node?
  2. 2.How many tapeouts or silicon revisions have you contributed to?
  3. 3.What coverage, timing or power target did you close, and where did it start?
  4. 4.Which tools and languages do you use daily?
  5. 5.What is the gate count, area or complexity of the largest design you have owned?
  6. 6.How many bugs or design issues have you found and fixed before silicon?
  7. 7.How many engineers do you work with or lead across design, verification and physical design?
  8. 8.What post silicon or bring up work have you done, and what did it find?
Answer them and see your score before paying

Words are the easy half

A resume can carry every term above and still be rejected, because coverage says what you know and nothing about what you delivered. The heaviest category on the rubric is evidence: how many of your bullets carry an actual figure.

Seven in ten is full marks. Most resumes we see manage two.

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